Data bits traveling through a high-speed transmission link may experience distortions as a result of inter-symbol interference (ISI), which causes one bit of data to interfere with and distort subsequent bits in a data stream. Such distortions may lead to bit detection errors at the receiver end.
Currently, decision feedback equalizers (DFEs) are commonly used to reduce the distortion of incoming bits of a data stream prior to sampling. DFEs utilize filter taps to cancel or reduce the residue of previous bits on a current bit of a data steam. However, the range and resolution of the tap values of the DFE are affected by variations in the manufacturing process, power supply voltage, and operating temperature (PVT) of the DFE, among other factors.
Some solutions involve overdesigning the DFE to ensure proper operation under PVT corner cases, however, this increases system size, power consumption, and system cost.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention, and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art.